1. Field of the Invention
The present invention relates to a multiple transistor consisting of a vertical transistor and a lateral transistor, and also to a method of manufacturing the multiple transistor.
2. Description of the Prior Art
In general, where a plurality of vertical transistors, each having a different current gains (h.sub.FE) are formed within a semiconductor wafer or chip by the use of a diffusion process, the h.sub.FE s of of the respective transistors do not considerably differ, even when the emitter area is varied using the same pattern. Therefore, unless the number of diffusion steps is increased to make the base width and the emitter impurity concentration different, transistors having different h.sub.FE s cannot be formed. An increase in the number of diffusion steps, however, is unpreferable due to a decrease in the yield of finished products and an increase in cost.
For such reasons, it has been impossible to manufacture transistors having arbitrary h.sub.FE s within a semiconductor wafer or chip under the same diffusion conditions, and hence, the degree of freedom in design for h.sub.FE has been low.